On Sunday, June 29, 2008 9:22 AM [GMT-3=CET],
Jinx  wrote:

> One question I have is about the bypass transistor Q4, a 2N3055
>
> I'd like to parallel 3 x 2N3055, as in this circuit
>
> http://www.freewebs.com/acselectronics/buildregs.html
>
> How would I best parallel 2N3055 in the electronics-lab link ?

The real problem you have to face is the drop Base-emitter and the gain of
each transistor

You can have a bunch of transistors produced the same day in the same batch
but they can have different VBE drop.
As you know this can make one or more Transistors to deliver more current
than other producing a lot of effects or its destruction... and this is
valid as well for the gain.

Assuming you will connect 4 transistors your ideal current in each branch
would be Io/4.
The conection is all collector in common to the source, all bases in common
to the driver with NO resistor.

Some ideas about this:
1.- A resistor in the base only cures the Beta effect but not the unbalance
drop out.
2.- Choose a resistor and connect it between the emitter and the
load(degenerative resistance;)
3.- There is a trade off between the unbalance percentage you allow and the
efficiency you get.
4.- You can use that resistance placing an opto diode with a resistor in
parallel so you can sense that drop.
5.- The main criteria to choose the RE resistor is 10 times Base
resistance/Hfe. (must confirm doing thevenin)

.... or

a dirver for each transistor with a very small resistance just to sens a
drop and to get a feedback.

it is very interesting.

Dennis.




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