> * 100 nF capacitors across the Vdd and Gnd pins of the 887. Do > I need a cap across the battery? It probably wouldn't hurt to have an electrolytic, say 100uF. This will help with peak demand as the batteries internal resistance goes up as they drain. Although with constant strobing it's debatable whether the cap would have time to store enough charge to make a difference > * The last button, PB6, has a pull-up resistor... 1 kilohm Anything up to 100k would probably do. PIC inputs are pretty high Z and don't need much current to hold them at a'1' state. I believe the weak pullups on PortB are something like 25k (you can work that out from the current drain in the specs) > Is it good enough for the pull-up resistor to go to 3 V instead of 5 V? State switching is related to Vdd, not always absolute voltages > I'm using the internal oscillators on the 887, which means I'll be > running it at either 4 MHz or 8 MHz 4MHz will use less power, and WDT period is the same at any Vdd if that's what you choose for the strobe timing. As I indicated in the other post, the really important frequency is the refresh rate, and that is just so much slower than the PIC > hopefully I won't have a problem as the battery voltages drop as > they deplete You might also look at paralleling batteries to double capacity. 4xAA in two parallel series-pairs. Packs of 4 x AA are cheap and common > One thing I've just been wondering about though... as the batteries > deplete and as the supply voltage drops from 3 V, will this have a > major effect on my LED's? This is where there could be a conflict in design. Choose fixed values and you have to live with both the limitations and simplicity. Or a very- slightly more complicated system for flexibility, eg monitoring Vbatt for dynamic alterations to drive Undoubtedly the brightness of LEDs will decrease as Vdd goes down using fixed timing and fixed components. You can't easily change the value of components, but you can do a lot with the timing A feasible solution would be to not drive each column for 100/6 of the time, ie a total of 166ms 'on' time per second. Instead, figures out of thin air, choose components that will give sufficient brightness at 100ms 'on' time per second at new battery Vdd So, say you refreshed at (1000/6)Hz. Each 16.6ms a new column is enabled, but instead of leaving it on for the full 16.6ms until it's turned off and the next column is enabled, enable it for just 10ms, leaving a 6.6ms blank period before it's disabled and the next column enabled. As Vbatt goes down, you increase the 'on' time, thereby decreasing the blank period. With the timing suitably linked to Vbatt, the perceived brightness, from a persistence of vision POV, will stay the same as Vbatt goes down This is, IOW, adaptive PWM drive -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist