Matthew Rhys-Roberts wrote:
> I need to crack this little problem... Please can anyone help?
> 
> I have a stream of numbers which are signed 16-bit integers, ranging 
> from + 32767 (7FFF) to -32767 (8001).
> The MSB is the sign bit.
> -1 is FFFF. etc

When you add two 16-bit numbers, you actually get a 17-bit result, where
the carry status is the 17th bit.

The general "trick" to handling signed arithmetic is to make use of this
17th bit along with the sign (16th) bit of the result: If both bits are the
same, then no overflow has occurred; if they're different, then you've had
an overflow. This works for both positive and negative results. [1]

In your case, you'll also need to check explicitly for the 0x8000 (-32768)
value, since it's a perfectly valid value in "normal" 2's-complement
arithmetic. [2]

Notes:

[1] Some procesors actually have an "overflow" status bit, which implements
    this logic directly in hardware. On the PIC18F series, it is called
    "OV" (bit 3 in the status register). You only need to check it after
    you've added the most-significant bytes in a pair of multi-byte values.

[2] I'm not sure why you want to exclude this value. If it's because of
    some sense of "symmetry", like not being able to represent its negation
    (+32768), I would point out that the usual method of performing
    negation -- complementing the bits and then adding 1 -- will result in
    a detectable overflow condition as described above.

-- Dave Tweed
-- 
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist