Also keep in mind that a lot of these circuits bias the input pin to something other than GND or VCC. Input pins draw more current when they are not fully on or off. This is because the internal input buffer turns both the N type and P type fets on partially, sinking VCC directly to GND. I don't know what the PIC curve is, but some cmos chips will burn several mA if an input pin is at a specific voltage between GND and VCC. Should be kept in mind for portable projects. Older CMOS chips would latch up and destroy themselves in this condition, but most CMOS chip manufacturers now guarantee their chips won't latch up for this condition. -Adam On 6/20/08, William Chops Westfield wrote: > > > > > > Pin High = Green > > > Pin Low = Red > > > Pin as Input = Neither > > > > > > > It occurs to me that this is a standard "logic probe" circuit, which I've > seen most often as a voltage divider dividing the supply voltage into three > parts, with the pin feeding one of the junctions, and "comparators" at each > junction biased at about one half of the supply. Ordinarily both > comparators are off, but a voltage on the pin will move one of the > comparators firmly into the ON direction (and the other one firmly off.) > In the attached circuit, the "comparators" are CMOS logic gates, but real > comparators or even transistors would probably work if you do things right. > > Seems like a large effort to get an extra color out of an LED... > > > > > > -- > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > > > -- EARTH DAY 2008 Tuesday April 22 Save Money * Save Oil * Save Lives * Save the Planet http://www.driveslowly.org -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist