OK, thanks! Now this is starting to get a little clearer. Does anyone have a good recommendation of a board house for prototype-quantity 4, 6, or 8 layer PCBs at a semi-reasonable price? Thanks, -n. On Sat, Jun 14, 2008 at 9:16 AM, peter green wrote: > James Nick Sears wrote: >> Hi, >> >> I'm thinking about making the jump into a 256 pin BGA for my next >> project, but I have a lot of unknowns when it comes to actually doing >> the layout. Does anyone have a good reference for things like what >> sort of footprint to use (a grid of vias, right?) > Generally no! Via-in-pad is possible but only with very specialist PCB > processes. If you try to do it with ordinary sized unfilled holes it > will just suck the solder away. Normal practice is to leave the pad > diagonally and then via down to an internal layer. > > The footprint itself should be a simple grid of (generally round) pads. > For details on the size and spacing of pads check with the manufacturer > of the device in question. > > You will need a PCB process fine enough that with vias positioned as > above you can get at least one and preferablly two tracks on each layer > between a pair of vias. For a 1mm fineline BGA to get two tracks between > a pair of vias you will want something like .1mm track gap and annular > ring and .3mm holesize. >> , suggestions on >> routing all of those pins out into the open > For the power pins you probablly want to go straight into an internal plane. > > For the signal lines it depends how much space you have, if you have > loads of space try to route out to the side nearest the pad in question. > If space is tight you will just have to add layers and/or reduce feature > sizes until the tracks fit in the direction you want. > > Blind vias are also an option but I suspect they will considerablly > drive up costs. If using them you want to route the pins from the middle > of the chip on the lower layers. > > If working with an fpga it is often usefull to switch pins arround as > you find which pin is easiest to get to for each track. > > If the chip has a load of power/ground pins in the middle then by > carefull positioning of the vias you may be able to squeeze in some caps > under the middle of the chip. > > > -- > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist