Short answer is...maybe.  What kind of speeds are you running this at?  There are complete specs on layout techniques for DDR2, including termination. 
 
Personally, I would pay very close attention to its routing, matched lengths, etc.

--- On Tue, 6/3/08, Herbert Graf <mailinglist4@farcite.net> wrote:

From: Herbert Graf <mailinglist4@farcite.net>
Subject: Re: [EE] Mobile DDR2 timing, how critical?
To: "Microcontroller discussion list - Public." <piclist@mit.edu>
Date: Tuesday, June 3, 2008, 12:58 PM

On Tue, 2008-06-03 at 15:44 -0400, David VanHorn wrote:
> I'm wondering how deep I have to worry about this problem.
> 
> I have a single processor, with two DDR2 dram chips. There is no
> facility for expansion.
> The chips will be located physically within an inch of each other.
> 
> Do I need to really carefully examine PCB trace lengths and timing, or
> can I assume no issues?

Personally, I'd certainly keep trace lengths and impedance issues in
mind.

DDR is a parallel bus. Any time you see the word "parallel bus"
length
matching should be something to be concerned about. 

TTYL


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