On Wed, May 21, 2008 at 7:40 PM, Rolf wrote: > Mark Rages wrote: >> On Wed, May 21, 2008 at 6:48 PM, Rolf wrote: >> >>> The simplest thing is to set the most significant bit of the TMR1H byte >>> very soon after the TMR1 interrupt.... (to be absolutely safe, it must >>> be within 256 ticks of TMR1 or 7.8ms). >>> >>> bsf TMR1H,7 >>> >>> What this does is cause the interrupt to happen in exactly 1 time per >>> second .... ;-) >>> >> >> Good idea (update only the high byte, let the low one run) but it won't work. >> >> >From the datasheet: >> >> The Timer1 high byte is updated with the contents of TMR1H when a >> write occurs to TMR1L. >> >> Regards, >> Mark >> markrages@gamil >> > > Hmmm... I took that from the Mid-Range family 'datasheet'..... pg 12-12 > > Actually, I was quoting a random 18F datasheet that Spotlight brought up on my laptop. I think there must be a difference between mid-range (which you were referencing) and 18F (which I was referencing) parts. But the 30F5011 that Mario is using is different still. It is a 16-bit part and doesn't need the high/low synchronization hack. So your idea will work: Mario can just "bset TMR1,15" in the timer1 ISR. Regards, Mark markrages@gmail -- Mark Rages, Engineer Midwest Telecine LLC markrages@midwesttelecine.com -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist