Mark Rages wrote:
> On Wed, May 21, 2008 at 6:48 PM, Rolf <learr@rogers.com> wrote:
>   
>> The simplest thing is to set the most significant bit of the TMR1H byte
>> very soon after the TMR1 interrupt.... (to be absolutely safe, it must
>> be within 256 ticks of TMR1 or 7.8ms).
>>
>>    bsf   TMR1H,7
>>
>> What this does is cause the interrupt to happen in exactly 1 time per
>> second .... ;-)
>>     
>
> Good idea (update only the high byte, let the low one run) but it won't work.
>
> >From the datasheet:
>
>   The Timer1 high byte is updated with the contents of TMR1H when a
> write occurs to TMR1L.
>
> Regards,
> Mark
> markrages@gamil
>   

Hmmm... I took that from the Mid-Range family 'datasheet'..... pg 12-12


12.12 Design Tips
Question 1: Timer1 does not seem to be keeping accurate time.
Answer 1:
There are a few reasons that this could occur
1. You should never write to Timer1, where that could cause the loss of 
time. In most cases
that means you should not write to the TMR1L register, but if the 
conditions are ok, you
may write to the TMR1H register. Normally you write to the TMR1H 
register if you want the
Timer1 overflow interrupt to be sooner then the full 16-bit time-out.

So, where did I go wrong ... ?



Rolf .....
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