I'm glad you find it Gordon.
However how exactly do you sampling the ADC and manage the CCP in the ISR ?
Are you using jalV2 for that, I'm curious...

thx,
Vasile

On 5/18/08, Gordon Williams <g_will@cyberus.ca> wrote:
> Anyone heard of floating ADC inputs causing glitches in the other parts of a
> chip?  16F886 device but may be similar to others?
>
> Using the CCP1 module (compare part) to trigger a change of state of the
> ccp1 output pin in an interrupt.  When the ADC is sampled the ccp1 pin will
> flip high randomly at the return from interrupt.  If I have the ADC off and
> the analog pins set as digital inputs - not a glitch is sight.
>
> My analog sources that I want to sample are 47K Ohm impedance and I get
> glitching in this case.  This is above the 10K recommended but there is a
> 0.01 uF by-pass cap on the input and this should provide the required
> leakage current and current to charge up the 10 pF hold cap.  Anyway if I'm
> off by a few LSBs I don't care.  The glitching is unacceptable.
>
> It maybe that certain voltage ranges aggravate the problem.  I don't know.
>
> Regards,
>
> Gordon Williams
>
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