In SX Microcontrollers, SX/B Compiler and SX-Key Tool, bean wrote:

I can't figure out from the I2C datasheet, can the slave only hold the SCL low after the ACK bit, or can it hold it low at any time during the transfer ?

The datasheet only shows it occuring after the ACK bit, but it doesn't say it cannot happen elsewhere.

I ask because I want to enhance the I2C commands in SX/B to allow the slave to stretch the clock. For exactly the reason Gunther suggested. To make I2C slave devices with the SX.

Bean.

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