On Sat, Mar 1, 2008 at 4:26 PM, Rikard Bosnjakovic wrote: > On 01/03/2008, Xiaofan Chen wrote: > > > Just take note that all the CMOS process Linear Technolog > > is using is at least 0.6 Micron. > > Has that got to do with anything? Is Microchip worse than this? > > Don't take me wrong, I know that the smaller the construction the more > can be fit, what I mean is - is it *required* for a company to use 0.6 > Micron to produce anything of value, or what does your comment mean? > The analog process is different from the digital process. You can not develop many good analog parts using smaller geometry. Microchip is typically using 0.25-0.5 Micron technology for their MCUs. You need 0.6Micron, 1Micron or bigger geometry to produce many good analog parts. Xiaofan -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist