In SX Microcontrollers, SX/B Compiler and SX-Key Tool, robotworkshop wrote:

Hello,

I've read on the data sheet that by default that Interrupts on port B (of the SX48) are supposed to be masked upon a RESET of the system.  One question that isn't clear is if perhaps they may be enabled if you have an Interrupt routine defined with the RATE parameter.  I had always assumed that when using an Interrupt defined via a RATE parameter that it only enabled the RTCC Interrupt and nothing else.  Is that a correct assumption?  Some of this I gathered from the section in the SX/B help file below:

[quote="From SX/B Help File:"]Asynchronous Interrupts
Every I/O pin in port B can be set to cause an interrupt upon logic level transitions (rising edge or falling edge). By configuring interrupts on input pins, the SX chip can respond to signal changes in a quick and deterministic fashion. In addition, an interrupt of this sort will wake up the SX chip from a SLEEP state. This can be configured by writing to the Edge Selection register (WKED_B) and the Wake-Up Enable register (WKEN_B) and detected by monitoring the Pending register (WKPND_B) in the interrupt routine. The I/O pins have interrupts disabled and are set to detect falling edge transitions by default.

As with edge selection, the Pending register bits will never be cleared by the SX alone; the running program is responsible for doing so. This means if a desired edge is detected, the interrupt will occur and the flag indicating this will remain set until the program clears it. Additional transitions on that pin will not cause interrupts until the associated bit in the Pending register is cleared.

To configure the I/O pins for wake-up (interrupt) edge detection:

Set I/O pin edge detection with WKED_B as desired. 
Use WKEN_B to enable the individual pins for wake-up interrupts. A high bit (1) disables interrupts and a low bit (0) enables interrupts. 
Set I/O pin directions as necessary. 
Clear the Pending register to enable new interrupts. 
[/quote]

If there is ANY chance that Interrupts are coming from anything else than the RTCC as specified by the RATE parameter I want to ensure they are disabled.  Recently i've found that some were inadvertently generated by the 16-bit TIMER1 when in TIMER mode.  The follwong code seemed to disable those Interrupts:

ASM
MOV W,#$07 ' Select read register T1CNTA
MOV M,W
MOV !RB,W ' (Use !RC for T2)
AND W,#$DA ' Clear bits 5, 2, and 0
MOV wrkVar,W ' move to temp variable
MOV W,#$17 ' Select write register T1CNTA
MOV M,W
MOV W,wrkVar
MOV !RB,W ' Write out the new value to config register (Use !RC for T2)
ENDASM

I'd also like to ensure they are disabled on all other possible sources.  At the moment I think I may add a block of code similar to the above to block them from TIMER2 even though I never touch it.  Also, i'd like to block any Interrupts from Port B.  My guess is that I have to write a 255 to the WKEN_B register to accomplish this.  Does that sound correct?  Has anyone else run into this before and had to disable them?

I'm trying to eradicate one last bug in my program and from some of the checks i've added it now appears that I may be getting an Interrupt generated by an encoder attached to the lower 3 bit of port B.  It's the only thing that seems to explain the behavior i'm seeing.  So, since i'm not confident that they are currently disabled I want to make sure they are by setting the registers myself to block anything coming from that port.

Any suggestions?

Robert

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