Quoting Mike Hord : > Happy New Year to everyone! > > What is everyone's opinion of latent defects caused by ESD in > CMOS ICs? We have a couple of failure modes for two different > products, both involving analog CMOS ICs (one a MUX, the other > a POR/BOR supervisor). > > The generalities of the failures are the same (previously reliable, > same component on several boards which has never failed before, > failure in the field but never in the factory). The biggest question > mark is that all of the boards which have failed were built on the > same line, same machine, within a couple of weeks span. > > During the winter. > > In the arid northern US. > > The bugaboo is this: IF these are ESD failures at assembly time, > why are these making it through production and out to the field > before failing? Corollary: why are only these components failing? > > Failure mode of the IC is reflowed silicon due to high current. > FA lab says electrical overstress: high voltage applied for a long > time. They CAN'T tell us why the other components on the bus > aren't dead (or even damaged, per their own package removal > studies). > > Mike H. Suspicious, IMHO, that you've seen *no* outright failures from this assembly house & run, yet apparently several "latent" failures. It's *possible*, of course, but I'd tend to suspect something else first and maybe second too. Was it the same customer as well? Symptoms.. latchup, perhaps? Is the power supply entirely internal or is it supplied externally or brought out to the outside world? Does this mux deal with external signals? Best regards, Spehro Pefhany -- "it's the network..." "The Journey is the reward" s...@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist