I just went thru a plethora of the same thing here in Arizona. We had 
designed
a system with the PLC located one meter from the sensor control PCB, 
which has
some HC logic and a big PIC.

The PLC was connected with two IDC26 cables, unshielded. We were repeatedly
killing 74HC86s by Fairchild and TI; using  transorbers stopped the 
failures but as
a safety measure, we replaced the HC86s with line receivers DS14C89A.

I  believe that a die shrinkage has occurred in the  HC world AGAIN, and 
some
designs have had to be re-examined, because as dies shrink they become more
responsive to noise.

--Bob A

Mike Hord wrote:
> Happy New Year to everyone!
>
> What is everyone's opinion of latent defects caused by ESD in
> CMOS ICs?  We have a couple of failure modes for two different
> products, both involving analog CMOS ICs (one a MUX, the other
> a POR/BOR supervisor).
>
> The generalities of the failures are the same (previously reliable,
> same component on several boards which has never failed before,
> failure in the field but never in the factory).  The biggest question
> mark is that all of the boards which have failed were built on the
> same line, same machine, within a couple of weeks span.
>
> During the winter.
>
> In the arid northern US.
>
> The bugaboo is this: IF these are ESD failures at assembly time,
> why are these making it through production and out to the field
> before failing?  Corollary: why are only these components failing?
>
> Failure mode of the IC is reflowed silicon due to high current.
> FA lab says electrical overstress: high voltage applied for a long
> time.  They CAN'T tell us why the other components on the bus
> aren't dead (or even damaged, per their own package removal
> studies).
>
> Mike H.
>   

-- 
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist