Hello. I'm been debugging this routine... clearram lfsr FSR0,h'F7F' ; point to the highest user ram position for 18F2525 eraseram clrf POSTDEC0,1 ; erase memory tstfsz FSR0L,ACCESS bra eraseram tstfsz FSR0H,ACCESS bra eraseram it puts the chip into an infinate loop.... and does the same when I run the simulator on the MPLAB-IDE... for some reason the FSR0 register never changes to a lower value. if I change the code to start at address 0 and do a POSTINC0 that does seem to work.. Just wondering if this is a known hardward defect or am I missing something?? Pat -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist