> Think binary :)

I'm trying!  Do you mean for me to binary weight the four switch resistor 
values (R4=2xR3;  R3=2xR2; R2=2xR1)?  I'm okay with that, but how does one 
optimize the value of the common pull-up resistor to minimize bunching of 
the resulting _voltages_, keeping in mind that V= 5 x (Rx / (Rx+Rpu))?   Is 
some sort of scaling factor required for the four otherwise-binary-weighted 
resistors to offset the bunching effect?   The system needs to reliably 
distinguish between the case where all four buttons are pressed 
simultaneously, and any one of the possible 3-button combinations.  My 
back-of-an-envelope scenarios yield some voltage values that are less than 
1% apart, which is too tight for comfort.  The archived solutions some folks 
have kindly identified seem to be invalid for multi-button combinations, 
which doesn't work for this situation.  Any more hints?

Thanks,
RR 


-- 
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist