>I accept your statement that a signal on the RX pin
>probably caused the problem but why do both GIE and
>PEIE need to be set for the unplanned interrupt to occur?

The datasheet does explain quite clearly how the interrupt enable chain 
works. Look at figure 15-7 (Rev B datasheet, page 139) 

-- 
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist