At 04:43 AM 8/30/2007, you wrote:
>Hi All,
>I am looking to run a CPLD at 200 MHz and I am finding it difficult to
>generate the CLK signal. I though about using a CLK multiplier, but I
>would like to have a low pin count one, like a 8 pin device SMD if
>possible.
>Any ideas would be appreciated.
>Best regards
>                 Luis

http://www.ctscorp.com/components/Datasheets/008-0321-0_B.pdf

Available programmed from Digikey.

>Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com



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