In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Sparks-R-Fun wrote: [QUOTE="Peter Verkaik"] The sequence to write to the DDR registers, once M is set, is: MOV W,DDRACOPY ;any DDR copy register MOV !RA,W If an interrupt occurs inbetween those 2 instructions, and the interrupt would update direction bits for port RA, then the interrupt update becomes undone. The function DDRupdate in library Portpin.h inserts an extra clockcycle when an RTCC rollover would occur inbetween those 2 instructions. As a result, the interrupt occurs before the MOV W,DDRACOPY instruction, so if the interrupt update the DDR registers, the change is maintained. [/QUOTE]Edge triggered interrupts might still experience a problem. - Sparks ---------- End of Message ---------- You can view the post on-line at: http://forums.parallax.com/forums/default.aspx?f=7&p=1&m=208986#m210767 Need assistance? Send an email to the Forum Administrator at forumadmin@parallax.com The Parallax Forums are powered by dotNetBB Forums, copyright 2002-2007 (http://www.dotNetBB.com)