> Anyway, the fact that the I/O pin i written in phase
> 4 of the instruction and read in phase 1 of the next,
> makes the issue worse, of cours. Adding a single NOP
> actualy makes the time from the write to the read *5*
> times longer (adding four cycles)... :-)

Fun issues I'm glad not to have in AVR land  :)
One instruction, one cycle, (mostly).

Phases?!  We don't need no steenkin phases!
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