Has anyone ever come across this effect before? (Assuming our code is 
perfect)

We have a design that uses two LTC1858 ADCs on a common SPI bus. On each 
IC, we have tied the ConvSt and !RD lines together ("mode 2" as per 
LTC's datasheet), and treat them as separate chip select lines. We also 
read the !busy lines of each ADC to determine when data is ready.

Our software services each ADC in turn. ADC0 is selected, loaded with a 
control byte (channel, range etc.), deselected, then the previous 
conversion's bytes are clocked out. This process is done for all 8 
channels. Then we repeat the process for ADC1.

The SPI routine clocks a channel/range selection byte into the ADC, 
which simultaneously clocks the high byte of the previous conversion 
out. We then clock a zero (don't care) byte into the ADC in order to 
clock the low byte of the previous conversion out.

We receive each ADC's channel data correctly. We have confirmed that 
each ADC is being sent the correct control bytes. But we are 
experiencing a strange effect where the control byte we send to one ADC 
is being acted upon by the other, i.e. ADC1 seems to be getting ADC0's 
range settings and vice versa.

Our work-around in software consists of sending range control bits to 
the opposite ADC, but we would prefer not to! Any clues?

Best regards,

Matt

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