Hi

I'm having a problem with an unexpected reset on an 18F4580. The chip is
running on a PICDEM2 board which has always been very reliable. The problem
seems to occur during reception of data on the UART. A breakpoint in the
initialisation routine shows that the chip is resetting. 

BOREN and WDT are OFF, examining the registers using an ICD2 after the reset
has occurred shows STKPTR = 0x41 (OK), WDTCON = 0x00 (def. OFF), RCON =
0x1E, which seems to indicate a watchdog timeout. The datasheet states that
RCON<~TO> which is bit 3 is set on power up and cleared by a watchdog
timeout. The watchdog timer section states the the wdog timer is not clocked
unless it is enabled so a timeout should never occur whether it is enabled
or not? I know that ~MCLR is the usual source of problems but I have used
this board a few times times before and a couple of times with this chip
without any problems so it seems unlikely. I can't turn MCLRE Off and use
the debugger which is a little frustrating.

Has anyone got any clues as to where else to look? Is the WDT information
correct? Could this be a problem with paging - I am using assembly language.

As an aside I mainly use dsPICs, the 18F seems a lot less user friendly. The
dsPICs exception handling has proven useful in the past.

Cheers

James

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