Rikard Bosnjakovic wrote:
> 
>         banksel OPTION_REG
>         movfw   OPTION_REG                      ; when TMR0 is
> altered, the prescaler is reset
>         iorlw   b'00000110'                     ; so we have to write it back
>         movwf   OPTION_REG
The prescaler is cleared, not the prescaler setting. This code is 
unnecessary. When you write to TMR0, the internal prescaler countdown is 
reset, but the division ratio doesn't change.

Also, I hope you're setting OPTION_REG fully when you configure TMR0. 
Doing read-modify-write operations on setting registers is rarely a good 
idea. Sometimes bits have weird read behavior, other times you're 
missing out on settings. For example, you need to make sure PSA is clear 
to assign the prescaler to TMR0. PSA is set by default. You also need to 
clear T0CS to tell TMR0 to run on Fosc, not an external pulse input. 
T0CS is also set by default.

Assuming you aren't touching OPTION_REG before, what you're doing is 
actually having no effect. OPTION_REG is 11111111 on startup, and ORing 
that with any constant isn't going to change anything. You're winding up 
with the prescaler assigned to the WDT at 1:128. The WDT times out every 
18ms nominal, which is 2.3 seconds with the prescaler assigned. You're 
probably having the WDT interrupt / reset your chip, not TMR0.

>         banksel GPIO
>         sleep
Also, sleep stops the main oscillator. This means TMR0 won't tick, and 
you won't get any interrupts.

-- 
Hector Martin (hector@marcansoft.com)
Public Key: http://www.marcansoft.com/marcan.asc

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