Are you sure is not a problem of PLL lock ?

On 6/27/07, Jinx <joecolquitt@clear.net.nz> wrote:
> > Hi, some time ago somebody claimed that the Frequency to PLL
> > can only be 4 MHz...
> > Could this be the issue?
>
> Well, this is very interesting. A valuable waste of time, if one could
> say that ;-)
>
> Using a 3.2768MHz on OSC1/OSC2, no matter what TMR0 is
> loaded with, in whichever order, the period is always 757.85us
>
> So I put a 4MHz crystal in and got these results (give or take a
> smudge for calls etc). 83.333ns instruction time @ 48MHz
>
> TMR0 free-running, 5432us. Which is, ta da, 65536 * 83.333ns
> TMR0 loaded with FB28 (- d1240) => 104us
>
> So the story seems to be, going back to the 3.2768, that the
> PIC may execute instructions at less than 48MHz derived from
> OSC1/OSC2, but TMR0 won't work properly. Probably
> other modules too
>
> As brought up in a previous thread, the correct way would be
> to use OSC1/OSC2 just for the USB and the frequency for
> the core and peripherals via T1OSC
>
>
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