> if I put in the order Jinx did TMR0H does not get transferred
> into the TMR0 register tough I see it in the special funct.reg
> window like it was - I got something 6ms delay in this way,
> but with the order the datasheet describes I got the 104ns
> timings

In the actual circuit I get 757.85us either way TMR0 is re-loaded.
So "something" doesn't care or is contrary to the manual

WTF ?

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