> > Fosc is derived from a 3.2768MHz crystal, and instruction
> > cycles are being measured as 101.72ns, so the PIC is running
> > at 39.3216MHz
> 
> Hi, some time ago somebody claimed that the Frequency to PLL
> can only be 4 MHz...
> Could this be the issue?

It's not for me to argue with a PIC, but it does seem to be running
fine with that crystal. Well, everything except TMR0 that is

> And/or are you sure about your Osc/PLL Config Settings?

Presently the CONFIG settings are few. The only one "I" think
is relevant to frequency is

         CONFIG  FOSC= XTPLL_XT

I'll have a look into the oscillator block. TMR0 is counting some
internal clock, because it rolls over consistently. Just why it's not
incrementing at 101.72ns is the mystery. Finding the relationship
between 104us / 03E8 / 757.85us / 101.72ns would be a clue. If
it came out to 4 or 8 you'd suspect a pre-scaler, but 7.28 ?

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