Hi Jan-Erik, I do not know, at the moment I have not access to 4450 but at least on simulator (MPLAB 7.41) if I put in the order Jinx did TMR0H does not get transferred into the TMR0 register tough I see it in the special funct.regwindow like it was - I got something 6ms delay in this way, but with the order the datasheet describes I got the 104ns timings. Tamas On 6/27/07, Jan-Erik Soderholm wrote: > > That is correct, but in this case (as I understod it) > TMR0L is never *read* and TMR0H is never written with > anything else then 0xFC, so the TMR0H-buffer whould have > the correct value anyway. But, I'd write them in > the correct order anyway... > > Jan-Erik. > > Tamas Rudnai wrote: > > Hi Jinx, > > > > I think you have to write TMR0H first which is a latency byte only and > it > > updated when you write TMR0L. Reading is the opposite way, TMR0H updated > > when you read TMR0L. > > > > Regards, > > Tamas > > > > > > On 6/27/07, Jinx wrote: > >> I've spent way too much time on this today trying to figure out > >> what's going on. Maybe someone can see something I can't > >> > >> Code for a s/w UART on an 18F4550 should have been straight- > >> forward, but TMR0 isn't doing what I expected > >> > >> Fosc is derived from a 3.2768MHz crystal, and instruction cycles > >> are being measured as 101.72ns, so the PIC is running at 39.3216 > >> > >> The loading I have for TMR0 should make about 104us, which > >> is the bit time for an 8MHz 18F1320 set to receive 9615 baud > >> (eventually the 4550 will be bumped up to 48MHz for USB and > >> the s/w UART will also be transmitting at 9615 baud) > >> > >> I calculate > >> > >> $10000 - $0FC02 = $003FE = 1022, * 0.10172 = 104us > >> > >> But TMR0 puts out 757.85us. I can't figure out what needs to > >> be done. It's not a recognisable multiple (~ 7.28), so counted > >> out a pre-scaler. The msdelay does put out the calculated 1ms, > >> so Fosc is good > >> > >> No interrupts or WDT enabled. The h/w UART is comming > >> with an external device at 9600 baud, no problems > >> > >> Any ideas ? Please ? > >> > >> TMR0 set-up > >> > >> mov b'000001000',t0con > >> ; 0 t0 off > >> ; 0 16-bit > >> ; 0 internal clock > >> ; x > >> ; 1 no pre-scaler > >> ; xxx > >> > >> Test transmission > >> > >> txa5 movlw 0x55 > >> call txw > >> call msdelay > >> movlw 0xaa > >> call txw > >> call msdelay > >> bra txa5 > >> > >> ;================================================ > >> ; Transmit byte from W - set dtx high/low (inverted) > >> ;================================================ > >> > >> txw movff wreg,temp > >> mov 8,cnt0 > >> bcf dtx ;Start bit > >> call bitdel > >> > >> byte_out btfss temp,0 > >> bra zerobit > >> onebit bcf dtx > >> call bitdel > >> bra nextbit > >> zerobit bsf dtx > >> call bitdel > >> > >> nextbit rrncf temp > >> decfsz cnt0 > >> bra byte_out > >> > >> bsf dtx ;Stop bit > >> call bitdel > >> return > >> > >> ; 1 bit delay, 104.004us > >> > >> bitdel mov 0x02,tmr0l > >> mov 0xfc,tmr0h > >> bcf intcon,tmr0if > >> bsf t0con,tmr0on ;timer on > >> btfss intcon,t0if ;wait for rollover > >> bra $-2 > >> bcf t0con,tmr0on ;timer off > >> return > >> > >> -- > >> http://www.piclist.com PIC/SX FAQ & list archive > >> View/change your membership options at > >> http://mailman.mit.edu/mailman/listinfo/piclist > >> > > -- > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist