Thanks again Herbert! searching my email for FPGA metrics I'm also looking at my copy of the java optimized processor (core) list, where the question of power consumption was on around January this Year... (http://groups.yahoo.com/group/java-processor/) the consensus was obviously frequency dependency - quiescent state or asynchronous operation constituting exceptions... that's another reason I like FPGAs cause such a thing as combinatorial asynchronous designs is theoretically possible! This brings me to another question! what is the lowest cost FPGA infrastructure that is runtime reprogrammable? None of those I mentioned, true? > > On 6/18/07, Herbert Graf wrote: Most of the FPGA tools have a "power estimator" tool that will tell you how many watts you need to supply. If you're relatively slow then power will be pretty minimal, say a watt at most. If you're running fast (and have alot of code) you can easily get into the 10s of watts range on some of the larger parts. As for power supply, each will need a few rails. At minimum there's usually a core supply in the 1-2V range, then there's at least one IO supply for each IO standard you need to drive (i.e. if you are driving 3.3 and 2.5V parts you'd have a supply for each, and the appropriate banks voltage inputs tied to the appropriate supply). Some parts have additional supplies for other things (i.e. the configuration section usually needs it's own voltage, usually a "standard" one like 3.3V). The only supply that you have to be really careful of is the core supply. The FPGA can source 20A or more of this supply if you run enough at a fast enough speed. Most vendors give "recommended" supply designs, and that's what I've always followed (sometimes with modifications to reduce size or capacity if I know I won't be drawing that much power). You are correct in that they are very closely related to CPU supplies, and most of the reference supply designs I've seen used chips meant for the CPU market (IIRC the supply I used for a Virtex 4 part actually has VID pins that are designed to change the voltage level; these pins usually connect directly to a CPU which is how the CPU can set it's voltage). Note that I usually deal with very large FPGAs, for the mid range it's likely things are "simpler", although power wise I don't see things being that different (unless you're barely using any of the capacity of the FPGA I doubt you'd get away with using a linear supply for Vcore). The IO and other low amperage supplies I usually either already have on my board, or just throw a linear part down. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist