On Sun, 2007-06-17 at 17:32 -0700, Tobias Gogolin wrote: > I'm as always keeping a watch on the accessibility of FPGA for my > experimental circuits from easy to order sources such as digikey.com or > mouser.com > And I recently noticed that there are now quite a few good offers in the > $20-40 range even with up to 500k gates > In comparison are all the big offers such as Xilinx. Latticesemi, Altera and > Actel > However some say gate equivalents some logic units and who knows what else > ... > How do these numbers relate and why? Unfortunately they don't. It's similar to trying to compare the amount of program memory for one MCU vs. another with a completely different architecture, 4kbyte of program memory on an 8bit PIC is not the same as 4kbyte of program memory on an ARM. The industry standard is usually a count of how many 2 input NAND gates you can squeeze into an FPGA. Unfortunately most FPGAs have LUTs far bigger then 2 inputs (and even then a 2 input LUT can contain more then 1 NAND gate in functionality, i.e. an XOR), so this count isn't of much use beyond a "factor of magnitude" number. The problem is different FPGAs have different architectures, meaning one piece of code may map much more efficiently in one FPGA vs. another. Even worse is the WAY you write your could can change things (i.e. how you encode your state machines, how many flops you use, etc.), along with how important timing is to you (a design aiming for fastest speed will need more logic then one designed for smallest size). And it's not just FPGAs from different companies having different capacities, even FPGAs from the same company can be drastically different in how they are able to map your code. As a result of all this, FPGA manufacturers don't even bother trying to standardize between each other, it's frustrating, but just the way it is. Some manufacturers DO give you a very rough idea of how to compare between their own FPGAs. For example, a Xilinx Vertex 4 LX40 has about twice the capacity of a Virtex 2 Pro 20, in a VERY rough way. The only way to REALLY tell is you just put your code through the tools and see how many LUTs you use. Depending on your code, a better way to tell sometimes is to see how many flops you use. The synthesizers are VERY good at optimizing combinational logic, so it's common to see very large device utilization fluctuation between parts on combinational logic. Flops OTOH aren't something you can really optimize away (aside from say tying a TESTEN pin low in the compile), so flop counts should be very similar between tools. Unfortunately it's very rare to be limited by flop counts in an FPGA (unless you use funky memories that can't be inferred as block rams, in which case you can easily blow away your flop count. This isn't a good idea though since using that many flops really kills your timing). To start off with I'd try putting your code through the tools and see which part it'll fit into. Then get a part twice the size. If you don't have code, go for a part "in the middle" size wise, it'll probably end up being WAY to big, but you can optimize that later. As for me, I've mostly used Xilinx parts and do recommend them. They have a version of their software that's free to use for many of the smaller parts. Good luck! TTYL -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist