wouter van ooijen wrote:

>>ahem, *any* CPU has a stack... if it allows for subroutine 
>>calls and/or interrupts :)
> 
> Not necesarrily. An ARM for for instance saves the return address of a
> call in a dedicated register (LR), and in another dedicated register
> when an interrupt occurs. An ARM also has instructions that make it easy
> to implement a stack unsing any of the 14 remaining registers (LR and PC
> are possible in theory but not practical), but that is all up to tyhe
> user - the CPU does not enforce it at all. (I guess you could reply by
> saying that an ARM has two dedicated, 1 level stacks...)

Hi Wouten, if I am understanding well from the little I see about ARMs, 
it looks like the old core of Acorn Archimedes (1989) is alive and kicking!
I remember that great architecture, with 4MHz, 4MIPS. There were some 16 
registers, 32 bits, and you could almost anything with anyone.
I remember that one was used as a Stack Pointer, and another as a Frame 
pointer.
I did not know (or remember) this thing about interrupt, and may also be 
that things changed a little. But, in the and, some Stack will always be 
needed in a CPU :)

Thank you for pointing this out.


-- 
Ciao, Dario
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