>>Anyway, the code for the ISR is big, > > That is always a bad sign ... > This is not a true statement. I have several times developed systems that required accurate timing for complex functions ( multiple simultaneous software UARTs, software video generation) in which nearly all CPU time, and a large proportion of code were in a (timer) interrupt handler. One useful trick here is that you may be able compute the correct outputs for interrupt N+1 during interrupt N, save them, and them output them at the very start of interrupt N+1. This can result in (on a PIC at least!) ZERO jitter. Bob Ammerman RAm Systems -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist