> ahem, *any* CPU has a stack... if it allows for subroutine > calls and/or interrupts :) Not necesarrily. An ARM for for instance saves the return address of a call in a dedicated register (LR), and in another dedicated register when an interrupt occurs. An ARM also has instructions that make it easy to implement a stack unsing any of the 14 remaining registers (LR and PC are possible in theory but not practical), but that is all up to tyhe user - the CPU does not enforce it at all. (I guess you could treply by saying that an ARM has two dedicated, 1 level stacks...) Wouter van Ooijen -- ------------------------------------------- Van Ooijen Technische Informatica: www.voti.nl consultancy, development, PICmicro products docent Hogeschool van Utrecht: www.voti.nl/hvu -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist