What is not perfectly clear is if the "Timer1 oacillator" actualy is the *same* osc as "LFINTOSC". It's also not clear if they with "internal oscillator" in section 6.4 means "HFINTOSC" (which *I* think) or something else. So *I* think that Jinx statement should read : > So I infer from that you can have the whole chip running > at 32k (LPINTOSC) or the core at HFINTOSC and T1 at 32k > (using the Timer1-osc, same as LPINTOSC ??). Jan-Erik. Jinx wrote: >> Somehow in the datasheet, the third sentence in section >> 6.6 (1) seems to contradict the previous statements > > Neil, DS41250F says, in 6.4, - > > The Timer1 oscillator is shared with the system LP > oscillator. Thus, Timer1 can use this mode only when > the primary system clock is derived from the internal > oscillator or when in LP oscillator mode > > So I infer from that you can have the whole chip running > at 32k (LP) or the core at IntRC and T1 at 32k > -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist