> On Sat, 2007-06-09 at 10:56 -0400, Herbert Graf wrote:
>> > My problem is that some devices (like DSPs) are not using a
>> > standard JTAG configuration, so common use of chained jtag loops could
>> > bring a lot of problems.
>>
>> I'm surprised to hear that, in my limited experience with JTAG (outside
>> of the FPGA sphere) while some devices do have "non-standard" commands,
>> other devices just ignore them, so it's not usually a problem to chain
>> them together.
>
> Rereading you post, are you saying that the PHYSICAL config differs from


Thanks for the comments! Being able to have onTap check connectivity of
almost the whole board is nice, and I can't do that with isolated jtag
ports. But, I've also heard that my new employer has had problems with one
big jtag loop. Since my resistor idea doesn't sound so good, I'm now
thinking of having a place for a jumper to connect the serial in of each
port to the serial out of the previous port. For normal board test, we'd
put in the jumpers to test the whole loop. If we need to get to individual
parts and are having trouble with the big loop, we can just directly drive
that one input.

Harold

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