peter green wrote: > Taking a chip with LVP disabled into program mode, > bulk erasing it (which enables LVP) and reprogramming > it (disabling LVP again) seems to work fine with PGM > floating even if the programers VPP rise time is slow, > you just don't want to leave program mode while LVP > is enabled. Right, if you do not cycle Vpp betweem the erase and the re-porgramming, there should not be any problem LVP floating. This might to a great degree depend on the internal arhitecure in the programming software. It would probably be simpler to make the erase drop Vpp at the end and to have the programming logic to raise Vpp in the beginning so that each routine could be run alone. In that case you'd better keep LVP low between the erase and the re-programming phases. Jan-Erik. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist