I asked this question once before in a slightly modified manner and never
received a response so I thought I would try again.

I have two PIC processors running at different speeds.  One is running at
8MHz using the internal clock and another is running at 40MHz (via PLL).  My
question is if I use the faster PIC as the master can I reliably send data
to the slower as long as I don't exceed the slower processors processing
capability.

I have built a simple test circuit that appears to work, but I want to make
sure that it is "within spec."  I cannot find reference to this in any data
sheet or other document.  I need to make sure this would be reliable in the
real world.

Any thoughts?
-- 
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist