Hi Jinx,


> Okey-doke. Any questions, please ask
> 
> As I said, I want to write this up properly, so for now I'll 
> keep it to
> an understandable minimum

Than you for sharing that.  Very generous.  

In keeping with that spirit here's an approach I used for imitation
anti-personal land mines. (Called WORMs for Wireless Operated Replica
Mines).  The mines using the 12F675 are buried up to 25cm deep in wet
soil.  The 433Mhz units at that depth have a range of about 20m.  In
order to broadcast the ID of the mine when it was tripped by demining
equipment it had to provide a message ID within 4mS.  After that the
target is usually turned into rubble.  The software sends out 200
messages and then stops to prevent jamming the next mine.  For testing
these mines are buried at various depths.

The code is written in C and is available from the Defence Research
Establishment Suffield (DRES).  I believe it's public now since the
tender to manufacture these included the source code written in
Bytecraft C.

Bits are 50uS long and transferred in a while (1) loop.

if (TIMR0 == Capture) {
  Capture = TMR0+TIME_PERIOD;
  iDATA_ASK = ~DATA_MSB; // Send bit: Low is Recessive (RF OFF), High is
Dominant (RF ON).
  GPIO = GPIO_Image;
  // Next Bit
  DataByte <<= 1;
  ...
}

/*
DESCRIPTION:
    On button press, sends out preamble stream,  then ID Byte 
	and then compliment of ID Byte.

	Bit stuffing is used because a message can't have more than 
	4 bits of a particular polarity.  

	The preamble breaks this rule by sending 5 bits Dominant, 
	5 bits Recessive

	After the 5 bits recessive a Dominant Start bit starts the data
	byte.

	The bit counter represents the total number of bits of a
message,
	not a byte.  The message is preformatted by external software.
	The end of the message is always terminated with a recessive 6
bits
	to prevent misinterpreting starts and ends of messages.
	i.e.  A node won't start receiving until it sees 6 bits of 
	bus silence.

	However,  with the rfPIC hardware the receiver doesn't have a
Squelch 
	ability which means that even with no signal,  the noise floor
creates
	an almost continuous dominant state.  So to condition the
receiver a
	slightly different process was chosen.

	The first message transmitted contains an extra preamble of 16
bits 
	consisting of 9 alternating 1's and 0's and then a recessive or 
	transmitter off time of 7 bits representing a new interframe
gap.

	This conditions the data slicer to properly see the 5 bit on/off

	preamble which signifies a new message.

	Once this first preamble is done, the rest of the block of
messages
	no longer needs the extra two bytes as the data slicer in the
receiver
	is now conditioned.
	
	For example without the initial conditioning preamble:

	Sending 0x55 which doesn't need bit stuffing looks like this:
	000001111100101010110101010111111
           |-0x07  |-0xCA  |-0xB5  |-0x5F  |-0xFF
    17 overhead bits plus 16 data bits = 33 bits * 50uS per bit = 1.65mS
	
	while sending 0xFF, which needs stuffing looks like this:
	0000011111011110111100001000010111111
           |-0x07  |-0xDE  |-0xF0  |-0x85  |-0xFF
	|         |    |    |   |    | |----|- Interframe Space(6)
      |         |    |    |   |    |- Stuff bit(1)

	|         |    |    |   |- Stuff Bit(1)	 
	|         |    |    |- Stuff Bit(1)
      |         |    |- Stuff Bit(1)
      |         |- Start Bit(1)  
      |--------|- Preamble for Data Slicer conditioning(10)

    21 overhead bits plus 16 data bits. 
	at 20kbps ==> 50uS/bit * 37 bits == 1.85mS

    Add in worst case Transmitter start up time of 1.2mS 
	and worst case message transmission time is:
	
	1.2mS + 1.85mS == 3.05mS
	
*/  

Automation Artisans Inc.
http://www.autoartisans.com
Ph. 1 250 544 4950


> -----Original Message-----
> From: piclist-bounces@mit.edu 
> [mailto:piclist-bounces@mit.edu] On Behalf Of Jinx
> Sent: Saturday, May 12, 2007 7:48 PM
> To: Microcontroller discussion list - Public.
> Subject: Re: [PIC] RF Tx/Rx modules with PIC (reposted with 
> tag... oops)
> 
> 
> 
> > That would be lovely, thanks!
> 


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