Hi,

May I suggest that you have a chat with http://www.cherryclough.com/ 


----- Original Message ----- 
From: "Sean Breheny" <shb7@cornell.edu>
To: <piclist@mit.edu>
Sent: Friday, May 11, 2007 5:18 PM
Subject: [EE] PCB clearances for moderately high voltage


> Hi all,
> 
> I'm trying to understand specs for PCB clearances for high-ish DC
> voltages. I'm working on an industrial product which uses a 48V DC bus
> (which can get as high as 80V under some conditions). There are traces
> on a couple of the PCBs in this device (an industrial robot) which
> carry this bus voltage. The PCBs will be in semi-sealed containers
> (not water or gas tight but very well dust-tight) and will be
> conformal coated. Normal operating environment will be below 50% RH,
> but if it wouldn't take too much more effort from a PCB design
> standpoint, I'd like it to be able to work in condensing humidity for
> a planned future application.
> 
> What specs are out there for the minimum clearance between a trace
> attached to the bus and any other trace (e.g. ground or a small-signal
> trace)? Do I have to abide by such specs legally or are they simply
> guidelines? If they are merely guidelines, what spacing do people
> typically use?
> 
> Almost all of the specs I've seen so far are from the IEC and are for
> AC line voltages. They also references things like "material class III
> or IV" or "functional vs. basic insulation" for which I've not been
> able to find definitions.
> 
> Thanks,
> 
> Sean
> -- 
> http://www.piclist.com PIC/SX FAQ & list archive
> View/change your membership options at
> http://mailman.mit.edu/mailman/listinfo/piclist
> 
>

-- 
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist