On Fri, 11 May 2007 12:18:16 -0400, "Sean Breheny" wrote:

>Hi all,
>
>I'm trying to understand specs for PCB clearances for high-ish DC
>voltages. I'm working on an industrial product which uses a 48V DC bus
>(which can get as high as 80V under some conditions). There are traces
>on a couple of the PCBs in this device (an industrial robot) which
>carry this bus voltage. The PCBs will be in semi-sealed containers
>(not water or gas tight but very well dust-tight) and will be
>conformal coated. Normal operating environment will be below 50% RH,
>but if it wouldn't take too much more effort from a PCB design
>standpoint, I'd like it to be able to work in condensing humidity for
>a planned future application.
>
>What specs are out there for the minimum clearance between a trace
>attached to the bus and any other trace (e.g. ground or a small-signal
>trace)? Do I have to abide by such specs legally or are they simply
>guidelines? If they are merely guidelines, what spacing do people
>typically use?
>

Check out the bottom of the main page at http://www.pcb-designer.com/ 

You'll find a table there that appears to be based on IPC specs. (If
it's not identical, it's very similar.) 

For up to 100 volts on a conformal-coated board, the minimum spacing
is listed at 0.005".


Regards, Bob

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