After doing some research on a recent thread, "Over/undervoltage and ESD 
protection of new PICs", a friend introduced me to the following chip. I'm sure it will 
be very interesting to anyone else looking at PIC I/O protection circuits.

http://focus.ti.com/docs/prod/folders/print/tl7726.html

- Protects Against Latch-Up 
- 25-mA Current Sink in Active State
- Less Than 1-mW Dissipation in Standby Condition 
- Ideal for Applications in Environments Where Large Transient Spikes Occur 
- Stable Operation for All Values of Capacitive Load 
- No Output Overshoot
- Typically clamps to much less than 100mV of GND and VREF, see graphs
- Simple, small, easy to use
- 6 circuits in one package
- Price?

Data sheet here:

http://focus.ti.com/lit/ds/symlink/tl7726.pdf

App note here:

http://focus.ti.com/lit/an/slaa004/slaa004.pdf

The app note makes very good reading for a summary of input protection 
requirements and methods. Applies to PIC's just as well as most other CMOS chips.

After reading the app note and data sheet I'm quite impressed and will very likely be 
designing these in to something somewhere in the future. A noteable limitation is 
they are 5V only (4.5V to 5.5V). Also need to consider circuit is designed to respond 
immediately to any fast transients (not just those outside of GND and Vref range). 
Discussed under "settling time" in the app note, will cause distortion of fast signals.

Regards, Brent.
-- 
Brent Brown, Electronic Design Solutions
16 English Street, St Andrews,
Hamilton 3200, New Zealand
Ph: +64 7 849 0069
Fax: +64 7 849 0071
Cell: 027 433 4069
eMail:  brent.brown@clear.net.nz


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