Peter, this is a pretty clear analysis. I will use this as the cannon 
fodder when he gets back from vacation
(next week).

What bothers me the most is the migration document. I have uncovered 
great weaknesses with the EEPROM
section that worked perfectly in PIC16C but in Nanowatt now has almost 
no reliability. Can a design be migrated or not?
Something does seem to be wrong here.

--Bob

Peter P. wrote:
> to Olin L.:
>
> I do not have an axe to grind. If I am dramatic then it's because that's what it
> appears to take nowadays to get some sane people to (re-)read the datasheets. I
> would also like to see what others do/did/will do. Even if I am dramatically
> wrong I would like that to be pointed out based on the facts.
>
> I was told (by Wouter) that 'I should design to the specs'. Here I shall try to:
>
> I would like to read your comments about some parameters in the datasheet I
> referred to (pic16f5x DS41213C), to stay on topic and off the dramatical stage:
>
> a0) (this is how it started): p59: table 11.0: 'Voltage on all other pins with
> respect to VSS: -0.6V to (VDD + 0.6V)': the chips I tested (about 10) all did
> not function when clamped with 1N4148, reading 0.5x volts on the clamp (clamp
> current was about 1mA), and needed clamping to 0.3x volts, using a Schottky
> diode. In the same circuit, drop in compatible older chips worked flawlessly
> (without any clamp). When those were forced into fault mode (that was almost
> impossible since the specified pin clamp current would have been exceeded), a
> 1N4148 or TVS fixed the problem as external clamp.
>
> a) p63. table 11.1: D003: Vpor = Vss (typ)
>
> I take it that Vss is specified with .0 precision so: Vss <= Vpor <= 0.05*Vss
> from this, lacking other info. Thus at Vss = 3V Vpor max is 0.15 V. Thus I need
> to provide a low Vol driver for it (f.ex. a 2N7000 or bipolar). Also if a cap is
> attached and a diode provides Vdd through a resistor to allow icsp, then the cap
> will in theory 'never' discharge to 0.15 V, even if Vss and Vdd are shorted. In
> practice it could take minutes. This is something that I have in fact noticed to
> happen, in despite of providing a discharge resistor between Vdd and Vss.
> Temporarily disconnecting power would rapidly drain Vdd but Vmclr would not drop
> low enough due to the diode. Then the next power-up could be a warm start
> (without por).
>
> b) p64. table 11.2: D030: Vil = Vss to 0.15*Vdd = 0 to 0.45 V @ 3V. Thus here
> only Schottky pulldowns will work.
>
> c) p64. table 11.2: D031: Vih = Vdd to Vdd - 0.45 V. Again Schottky required.
>
> d) same, D080, D081: The part outputs 8.5/3.0 mA only at high saturation drop. A
> 16C54 would provide 20.0/15.0 mA here (quoted from memory). The 16f54 is
> supposed to be drop-in compatible. The migration document has no word on this.
>
> I think that PICs are great chips. I also think that this particular batch is
> not so. I also think that the 0.3V from rails requirement for low cost parts
> without A/D is not reasonable. There is no point in having $ 0.5 chips that
> require a 70 cent reset chip, a $ 1.0 2% regulator and 5 cents/pin in Schottky
> clamps, plus a 2-sided board with plated vias to hold the resulting jungle, and
> all this can double the parts count in a small project.
>
> Maybe I had a freak batch but I don't think so. Vasile said that he determined
> the susceptibility threshold to be 0.3-0.4 V. So what's the inexpensive,
> obtainable, and well-known fix for this (besides adding 20 BAT54S diodes - hey,
> at least one gets a quantity discount when buying so many). Yes I am a little
> sarcastic. No, I will not go on.
>
> Peter P.
>
>
>   

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