Vasile Surducan <piclist9 <at> gmail.com> writes:

> On 4/1/07, Peter P. <plpeter2006 <at> yahoo.com> wrote:
> > wouter van ooijen <wouter <at> voti.nl> writes:
> > > > The problem is that many (most) CMOS chips are now specified
> > > > for Vdd-0.3 to Vcc+0.3 maximum limits *operating*.
> 
> Maibe VDD-0.3V and GND+0.3V.
> 
> It's not 0.3V. As an average value is between 0.4V and 0.6V.  At least
> at the PIC series I've measured.

The specifications in the datasheet disagree with this. That's the point.

Peter P.



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