On 4/1/07, Peter P. wrote: > wouter van ooijen voti.nl> writes: > > > > > > The problem is that many (most) CMOS chips are now specified > > > for Vdd-0.3 to Vcc+0.3 maximum limits *operating*. Maibe VDD-0.3V and GND+0.3V. It's not 0.3V. As an average value is between 0.4V and 0.6V. At least at the PIC series I've measured. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist