> The problem is that many (most) CMOS chips are now specified 
> for Vdd-0.3 to Vcc+0.3 maximum limits *operating*.

AFAIK not for PICs, the Vcc+ and GND- specs are in the absolute maxima
section (= chip will survive, not chip will work). Has been so for ages,
so for normal operation you could never depend on these diodes.

> a - body ESD diodes cannot be used for anything at all

they can: for chip survival, but not for normal operation

> For a 13 IO pin part, this means that:
> 
> e - 26 diodes which were previously implied present are no 
> longer present f - the actual cost of the part is the cost of 
> the part plus the cost of the external suppressor plus the 
> cost of the board space consumed, plus the cost of extra 
> routing (which can mean vias or a double sided board where 
> one layer was enough before).

You assume protection is needed for all pins. Is this realistic for pins
that stay on the (not too large) PCB, like a pin feeding a LED or a
transistor,  or receiving from a TSOP? Such pins are often coupled to
GND or Vcc by a relatively low impedance by the rest of the circuit, so
except when you do funny things nearby (like PWMing a nice inductive
load) you should be save without additional components.

Wouter van Ooijen

-- -------------------------------------------
Van Ooijen Technische Informatica: www.voti.nl
consultancy, development, PICmicro products
docent Hogeschool van Utrecht: www.voti.nl/hvu
 
 

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