Since now most CMOS microprocessors are again sensitive to conduction of their
body diodes (as they were in CMOS CD4xxxA times), and are no longer immune to
body diode currents (as they were in CMOS CD4xxxB times, i.e. for 25 to 30
years), the time has come to look the problem in the face and find common
solutions, as I find that this 'return to the past' can be quite costly.

The problem is that many (most) CMOS chips are now specified for Vdd-0.3 to
Vcc+0.3 maximum limits *operating*. This means that:

a - body ESD diodes cannot be used for anything at all
b - internal MOSFET reverse diodes must be ignored
c - external clamps which are able to clamp at Vf=0.3V for usual surge currents
must be provided externally. Silicon clamps and tranzorbs do not work.
d - the cost of doing this must be assessed.
e - leakage from Schottky clamps compromises some of the advantages of CMOS
inputs. Its strong temperature dependence can make certain A/D schemes stop
working altogether (e.g. R/C a/d converter on external pin)

For a 13 IO pin part, this means that:

e - 26 diodes which were previously implied present are no longer present
f - the actual cost of the part is the cost of the part plus the cost of the
external suppressor plus the cost of the board space consumed, plus the cost of
extra routing (which can mean vias or a double sided board where one layer was
enough before).

The problem gets worse with more IO pins.

So according to my simple calculations, taking an 18-pin low cost PIC as example:

- budgetary price:                             1 x $ 0.5  = 0.5
- add 13 double external Schottkys in SOT-23: 13 x $ 0.03 = 0.39
- add board area to accomodate Schottkys, 
and 2nd layer and vias to route network,
add assembly and stock costs for added parts:    + $ 2    = 2.0
                                                           -----
                                                            2.89

Cost of MCU out of this: ~ 17% (less than a fifth)

Thus, there are no $ 0.5 microcontrollers if they only accept +/- 0.3 V limits,
operating. $ 0.5 MCUs are a myth in the same class as 1000 Watt PMPO
specifications for pocket iPod speakers under these conditions. The 'break even'
price, when a MCU costs as much as the external suppression network needed to
protect it, is then about 5 cents/IO pin that needs protection for the first few
pins, and after that the price jumps when the board must be augmented to add all
the new parts. Thus a $ 0.5 MCU 'breaks even' when about 10 IO pins are used,
and the cost roughly triples afer that (accounting for the 2-sided board). The
parts count jumps from one to 14.

Questions:

Q1 - what is the general take on this. I understand that the revolutionary
'return to the past' represented by return to CMOS 4xxxA series 'performance'
happened quietly and without any howls of opposition. Probably helped by $ 0.5
MCU budgetary pricing, attractive to beancounters and innocent, credulous young
men who believe that migration documents are written to ease their pain.

Q2 - is there a list of standard clamp (row) parts that can mitigate the 
problem without breaking the bank ?

Q3 - what happens to small minimal parts count projects where the parts count
can double or triple due to the new clamping requirements ?

Q4 - are mcus with origin China etc affected by this ? (i.e. Holtek, and many
others ?)

Candidate parts:

Single device: BAT42  <tbd>
Double device: BAT54S $ 0.02 / 3k

Multiple devices: Semiconwell etc, 6 channels -> $ 0.30+ / 5k etc

Any comments are welcome.

thanks,
Peter P.


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