On 3/6/07, Marcel Birthelmer <marcelb.lists@gmail.com> wrote:
[...]
>  In the idle state, both voltages are low. When one switch (assume
> it's SW1, without loss of generality) is closed, the transistor Q2
> turns on, dropping its collector voltage (and thus Q3's base voltage)
> close to 0. Q3, in turn, is cut off, leaving no current to flow
> through SW2 if it is closed. The same takes place if SW2 is pressed
> first. When SW3 is closed, both outputs are forced high via the
> diodes.

Brilliant.

Given the explaination, I didn't have too much difficulties
understanding the circuit, but I would have most likely never been
able to design something similiar myself.

How do you professionals do when you design stuff like this?


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- Rikard.
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