On Mar 5, 2007, at 8:35 PM, Rikard Bosnjakovic wrote:

>> To use RA5 as an input, you must first configure the chip NOT to
>> use it as MCLR (a bit in the configuration word.)
>
> Excuse me for being ignorant, but I'm still a bit confused. I don't
> understand this paragraph:
>
>      A '1' in the TRISA register puts the corresponding
>      output driver in a High-impedance mode. A '0' in the
>      TRISA register puts the contents of the output latch on
>      the selected pin(s).
>
> Does this means a "1" makes the port an input, and "0" an output? So
> for my particular case, RA5 should be "1" (it cannot be 0)?
>
TRISA.5 should be 1 to make it an input; you may be able to set it
to 0, but since there are no output drivers to enable, it won't
have any effect.

But the bit I was talking about is "MCLRE" in the configuration word,
described on page 94 of my 628a datasheet (section 14: special features
of the cpu; 14.1: configuration bits.)

  bit 5: MCLRE: RA5/MCLR pin function select
   1 = RA5/MCLR pin function is MCLR
   0 = RA5/MCLR pin function is digital Input,
       MCLR internally tied to VDD

BillW
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