Wow! It really was a silicon bug!

Harold


> On Thu, 1 Mar 2007, Harold Hallikainen wrote:
>
>> I wonder if that's a silicon "bug" or a silicon "feature." I suspect the
>> compiler wants to put everything in one source file on one page of
>> memory.
>
> Refer to the 18F452 B2 silicon errata.  This part had problems with
> certain types of crossings of the 0x4000 program memory boundary.
> Hi-Tech's compiler provides the necessary workaround.
>
>>> I was getting out of memory errors using Hi-Tech PICC-18 with an 18F452
>>> at around 50% ROM usage.
>>>
>>> Hi-Tech support told me it was due to a bug in the silicon and the fix
>>> was to split my program into multiple files which could be linked
>>> separately.
>>>
>>> No further problems since doing this.
>>>
>>> Regards,
>>>
>>> Nigel
>>>
>>>
>>> Carl Denk wrote:
>>>>
>>>> Thanks for the reply. From MPLAB >view > memory useage gauge > program
>>>> memory 2259/4096 and data memory 155/256 if those are the correct
>>>> place
>>>> to look, should be lots to go. The normal output of this is via
>>>> "putcUSART" in a loop. I'm trying to use the printf a minimum work to
>>>> output 6 integer variables to scale/calibrate the ADC.
>>>>
>>>> Harold Hallikainen wrote:
>>>>
>>>>> How's your overall rom usage? I get these errors when stuff gets
>>>>> tight.
>>>>> The linker just goes along stuffing stuff in rom until it runs out of
>>>>> room, which appears to have happened with the printf code.
>>>>>
>>>>> Harold
>>>>>
>>>>>
>>>>>
>>>
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>>
>>
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