Hector Martin [PIClist] wrote: > IC2, is the controller. Its built-in comparator is used as the > switching > output controller, with the reference provided by its VDD, You were fine up to here, but the 10F204 has a internal absolute 600mV reference. It's not very accurate, but can be internally tied to one input of the comparator with a external pin being the other. In this case GP1 is the external comparator input. The comparator is not directly driving Q3. The comparator output is only read by the program, which then drives GP2 to switch Q3 on and off as it sees fit. > This seems to take its input from the DC-DC output, but it > will bootstrap off of the USB 5V when powered-up (straight through > L1). > Interesting the use of discretes instead of an LDO: is there a good > reason for this, besides cost? Yes. This was discussed at length in my response to Peter. The main issue is that LDOs aren't specified for operation when the input is less than the regulated output voltage. This zener regulator behaves nicely and predictably when the input is 4V, for example. Other advantages are cost and the diode isolation from the rest of the circuit when Vdd is driven during programming. > The reference input can be grounded (and thus disabled) > through PWRDOWN through Q2. Actually that is the MCLR input configured in its MCLR role. So the supply is disabled when PWRDOWN is high by holding IC2 in reset. > SH1 (what the hell is that? I call them "shorts". They are just connections from your point of view. They are ways of splitting nets in Eagle to assign each different properties, and also to force all the current between two parts of what would otherwise be the same net thru a single point. SH1 and SH2 keep the switcher loop currents isolated and off the main power and ground nets. > then a > diode D2 (unsure why, besides the 0.7V drop), This has to do with the only way you can kill a 7805. > There is also a > 100R resistor between USB GND and GND: why? I'm not quite sure how all USB cables are wired and how the shield (if any) is connected compared to the ground conductor. If there is a shield I want it not to flop around, but I also don't want the ground current flowing thru it. > a jumper between grounds which if > I'm not mistaken are connected anyway (wtf? is this just for a > convenient ground connection?), Note that the grounds are two different nets, GND and GND2. They would not be connected automatically. Eagle thinks SH4 is a two-pin component that happens to connect to GND and GND2. In reality, SH4 is just a copper connection, so GND and GND2 are the same thing electrically. The reason for doing this is that GND2 is a local ground for IC3. SH4 is the single connection to the main ground, so only overall return current will flow thru it. The high frequency loop currents caused by the PIC will be kept confined to GND2, which is also kept physically close to IC3 in the layout. What isn't shown in the schematic is that SH3 (the single feed for the PIC power) and SH4 are physically adjacent on the board, with C12 immediately accross the two on the PIC side. C12 then becomes a shunt for high frequency loop currents. From the rest of the circuit's point of view, the PIC draws power at SH3 with ground return at SH4, and with little high frequency components. If this were more than a two layer board I would have made GND2 a small local ground plane patch immediately under the PIC and its crystal in a layer above the whole board ground plane. Since this is only a two layer board, I just kept the GND2 connections short and straight and minimized their overall length in layout. > Also, CIN+ isn't used for it's presumed purpose, so I'm guessing > there is an internal voltage reference on these PICs Yes there is, and it's internally tied to one of the comparator inputs. > GP2/CIN+ instead drives a pair of transistors, Actually it's GP0, but you obviously have the right idea. > Weird charge-pump > arrangement on the schematic - it could have been clearer. Hmm. I guess it's not how charge pumps are usually shown, but I was using height on the page as a rough indicator of voltage. Perhaps you can suggest a clearer way to show it? > drives two transistors in darlington configuration to amplify this to > an output voltage. That's the basic idea, but it's not technically a darlington since the collectors of Q10 and Q11 aren't tied together. But the basic principle is the same, which is that Q10 and Q11 together form a high gain emitter follower. > There's a transistor to short VDD to ground through a > 22-ohm resistor to presumably empty out residual charge when powering > down. Since the VDD line is the target circuit's Vdd, there can be considerable capacitance on it. Substantial current drive is therefore required to charge and discharge the capacitor when changing VDD. Q10 and Q11 can only drive high. Without the active discharge path thru R31 and Q12, switching Vdd low could take intolerably long. > There's a second op-amp that just buffers the scaled-down output > VDD voltage (used as the - input of the first op-amp), which is then > clamped to between +5V and GND, and divided down again. This feeds > back into the PIC in Page 2. It's easy enough to see what is connected to what, but can you explain why it is there? > Page 5: > Similar to Page 4, but somewhat different. I am unsure what the need / > use of transistors Q15 and Q16 are. Ah yes, that is much more of a challenge to figure out. Just describing how the circuit is wired isn't good enough for this one. You are right in that the emitter of Q17 is kept at roughly the Vpp voltage, and Q17 is turned on to raise the VPP line to that level. Now think about how the line at the emitter of Q17 is regulated? Where is the feedback path? How is the right voltage ultimately guaranteed on the collector of Q17 when it turns on? > Page 6: > I'm unsure about Q20 and Q24, maybe they're there > to improve the frequency response? Think about when they will turn on. When they do turn on, what effect do they have? > Wouldn't > rail-to-rail op-amps be more than enough to reach as low as the lowest > PIC operating voltage, not to mention programming voltage? But they need to do more than that. In any case I've already discussed this at length in a response to Peter. > The PGD and > PGC drivers are also pretty complex. Yes they are, although note they are built totally from cheap parts. I was hoping to get away with less complex drivers, but those didn't meet all the criteria. Can you figure out what all the design criteria were for the PGC and PGD output drivers? Why are there two separate PIC outputs to control each driver? > In the case of Lindy, am I the only one who can tell that people > should start at the beginning with her (besides Olin)? Interesting that you think Lindy is a she. I guess you could be right. His (her?) writing style didn't give me that impression. ******************************************************************** Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products (978) 742-9014. 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