I haven't been able to gleam from the Cypress website...in fact, the reference schematics do not show any termination resistors at all. This will be running low speed.....its feeding into a FPGA thats going to be the bottleneck on the system. peter green wrote: > -----Original Message----- > From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu]On Behalf > Of Herbert Graf > Sent: 31 January 2007 18:33 > To: Microcontroller discussion list - Public. > Subject: Re: [EE] USB routing and termination > > > On Wed, 2007-01-31 at 09:17 -0800, alan smith wrote: > > I was given a project that was shelved some time ago, and the > engineer that was working it is long gone. No PIC, has a PSoC on > it, being used as a USB bridge among other things. It was routed > as just signals, across the board, so no wonder it doesnt work. I > assume that it should be routed as diff pair for one thing, but > anyone know off the top of thier head what the route length > restrictions are? Also, the design has a 120ohm transformer in > line (assume for EMI?) as well as a 27.4ohm resistor in series > with the D+/D- lines. All the designs I've seen just come from > the chip direct to to the header for the USB connector. It does seem a bit weired especially the transformer what does the datasheet for the chip in question say? is this low speed? full speed? high speed? -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist --------------------------------- Never miss an email again! Yahoo! Toolbar alerts you the instant new Mail arrives. Check it out. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist